General Circulating Current Differential Theory

Differential relays use the principle that when there is no fault within the zone defined by the CT locations, the currents from each of the CTs are all balanced and hence circulate around the parallel connected CTs.  Although the relay is in parallel to the CTs, its relatively higher impedance than the CT paths and the balanced current flow on the secondary currents from all the CTs means there is minimal operating current through the relay and hence it should not operate.

High impedance differential protection effectively responds to a voltage across the relay connection, which in turn leads to sufficient operating current in the relay to operate.  Hence the relay setting may be in terms of voltage or the current sensitivity.

The figure below shows the simplified arrangement for no fault inside the zone of the bus bar protection scheme.  In this example the CT on the right hand side has saturated due to high current in one circuit but the scheme must remain stable and not operate as there is no internal fault. In this circumstance the saturated CT effectively is seen as a short circuit and has zero output voltage and hence does not produce any output current itself.  Because we don't want any current flowing into the relay path connection, the left hand CTs therefore have to produce sufficient voltage to drive the circulating current through the saturated CT on the right. Consequently there is a voltage profile on the secondary circuit from left to right resulting in a voltage appearing across the relay connection. Provided this produced relay voltage is less than the operating threshold of the relay, the scheme will be stable.

The relays may be inherently voltage setting based relays with the advantage of a natural high impedance with the resultant low operating current sensitivity typically less than 30milliamps on the secondary side.  Alternatively, current setting based relays with higher operating current can be used with external resistors to create the high impedance arrangement with the resistor calculated to give the required voltage threshold at the setting current.  Current setting based schemes have the possibility that the operating current can be set above the maximum load current of a single circuit in order to avoid mal-operation in the case of a CT open circuit which would otherwise cause operation due to the apparent differential current.

  (click to enlarge)

Principle of minimum knee point voltage to cater for saturated CT during external fault/through current i.e. no internal fault:

Simple analysis of the circuit for current flow during through fault or load conditions yields the minimum CT knee point voltage as given by applying Ohm's Law.

V_kp ≥ I_f x 2 x (R_ct + R_l)

• V_kp is the minimum knee point voltage
• I_f is maximum fault current (including for high Source Impedance Ratios)
• R_ct is the CT winding resistance:  there are two R_ct in the circuit)
• R_l is the loop impedance from the CT to the relay (i.e. twice the individual lead burden):  there are two R_l in the circuit)
• the "2 " factor is mandatory by Ohm's Law because there are two R_ct and two R_l in the circuit

All CTs in a differential scheme must meet all four of the following criteria.  They must have:

1. well-matched excitation characteristics,
2. the same turns ratio,
3. low secondary winding impedance,
4. low excitation current.

This is why differential relays require PX class CTs in order define the physical construction of the CTs, rather than the connected burden defined by class P CTs as discussed here:. Current Transformer - choosing PX or P class?

Choice of "k" Factor

We have established above that for through fault stability and by Ohm's Law:

V_kp ≥ I_f x 2 x (R_ct + R_l)

When an “internal” fault occurs on the bus bar, the sum of the currents flowing in do not equal the sum of the currents flowing out.  This is reflected on the secondary circuit at the connection point of the relay.  Using Kirchhoff’s Law, it is clear that the differential current, representing the primary fault current, must flow through the relay path. 

Due to teh variation of relay construction, we need to include an additional "k" factor.

V_kp ≥ k x I_f x 2 x (R_ct + R_l)

"k" is therefore a factor dependant on the choice of relay as electromechanical or electronic, and whether the relay is specifically designed to operate when a HEAVILY SATURATED current waveform is applied to it.

In order to understand the purpose and value of this extra "k" factor, we must therefore consider what is happening during internal faults.

Internal fault waveform and tripping

Before determining the relay setting voltage we must understand the problem of CT saturation during internal faults.

Consider a system which happens to have the following

Vkp >= 400 V
Vs >= 200 V
     Vs is the relay setting voltage

a) If we have a relay set in terms of voltage, it will still have a certain impedance and hence an associated current sensitivity e.g. I_s = 0.02 A, then the equivalent total impedance of that relay is
Rtot = 200 V / 0.02 A = 10k ohms

And hence for an internal fault when all the fault current flows into the relay path, the theoretical unsaturated voltage would be
V_unsat = I_fmax (R_ct + R^_loop + 10000 ohms) >= 200 kV !!!!!!!

b) If we have a current operated relay with current setting Is = 0.1 A, then we must make sure that for a through fault when the voltage at the relay point need the total impedance of the relay path to be such that the current through the relay is less than the pick up setting (sensitivity) of the relay:
R_tot >= 200 V / 0.1 A = 2000 ohms

Now consider for an internal fault with I_fmax = 20 A, the theoretical voltage to be developed by the CT to avoid CT saturation would be
V_unsat = I_fmax (R_ct + R^_loop + 2000 ohms)
so it is clear V_unsat > 40 kV !!!

Clearly neither of those voltages in a) or b) are able to be developed by the CT and HEAVY saturation occurs very early in the CT waveform of an internal fault i.e. when we want the relay to operate ..

The result is this classic "shark fin" waveform  "/|____" which then repeats in the negative half cycle.

Blue line is expected unsaturated output,
Black line is saturated output due to excessive burden
(based on IEEE tool: http://www.pes-psrc.org/Reports/CT_SAT%2010-01-03.zip )

Clearly as an internal fault, we need the HiZ differential relays to be able to work with these heavily saturated waveforms which clearly are full of lots of harmonics as well as some fundamental frequency component..

Some specifically designed electromechanical relays have proven over many decades that they will work satisfactorily and achieve ~ 20 ms operating time under these conditions because electromechanical relays basically work on the amount of energy that can be pumped into the armature.

However electronic relays work on exceeding thresholds of current measurements typically with some sort of signal processing filters such as Fourier Transforms to identify the fundamental component.  The relay algorithm then works on that "filtered fundamental" waveform.
Clearly the fundamental frequency component of the shark fin /|____ is much less that the anticipated peak of the pure sinusoid of the primary fault current - the primary current will still be a "pure" sinusoid.. 
Hence CT heavy saturation may lead to the relay not operating at all, or perhaps very slowly as the relay has to wait for the waveform to come out of saturation.
This means that the electronic relays will most likely need CTs that are MUCH larger V_kp than the requirement for electromechanical relays so the formula includes this "k" factor for which the value is defined by the respective vendor:

V_kp ≥ k x I_f x 2 x (R_ct + R_l)

For some electromechanical relays specifically designed for saturated waveform operation, e.g. MCAG14/34 or MFAC14/34 we can combine this to be (k x 2 ) = 2

However as indicated by one manufacturer of an electronic relay, if the combined value of (k x 2) = 2  (as required for electromechanical relays) the operating time may be degraded as much as ~100 ms
... but if you wish to retain the same ~20 ms as per the electromechanical relays you need the combined value of (k x 2) i.e. k' = 16, i.e. CTs which are 8 x larger than equivalent electromechanical relays.
This example of a typical electronic relay offered for HiZ applications combines "k" with the "2" factor as a "combined" k value, in which case k must be a minimum of 2 to satisfy Ohm's Law stability so be areful of whether the formula i squoited as 

V_kp ≥ k x I_f x 2 x (R_ct + R_l)    ... k is a minimum of 1

or

V_kp ≥  k x I_f  x (R_ct + R_l)    ... k is a minimum of 2

(click to expand)

Hence be very careful of selecting electronic relays that you have correctly assessed the operating time vs kneepoint voltage requirements. 

Certainly modern numerical relays offer benefits of waveform capture for internal faults - it would be very useful to prove the saturated waveform characteristic but note that is not the actual primary fault current waveform!  IEDs may also offer other benefits of direct LAN communications, perhaps even integration in IEC 61850 systems. 

However it may be more prudent to retain the electromechanical relay performance with lower kneepoint voltage requirements and simply use a generic I/O device as indicated in the third diagram here CB Interface, Relay Contact Interface . The I/O device would ideally be able to have its generic GGIO input/output Logical Node renamed as PDIF to provide its relevant semantic in the IEC 61850 SCL files.

Relay Setting

Now that we have the correct sized CTs to ensure stability for through fault and suited to allow the relay to have a fast operating time with heavily saturated internal fault currents, we can now consider the calculation of the relay setting.

Here we must calculate the minimum setting that will not result in operation for a through fault.  We do not consider the internal fault condition.

By applying Ohm's Law we can determine the voltage at the relaying point during a through fault .. i..e  the relay MUST NOT OPERATE when that voltage is applied to it.  Clearly then, the relay pick up setting must be HIGHER than that minimum .
The minimum voltage setting is the application of Ohm's Law on the assumption that one CT has saturated but we still want stability that the unsaturated CT output current will still flow through the saturated CT.  Hence we can apply Ohm's Law to the saturated CT side of the relay

V_s >=  k x I_f x (R_ct + R_l)

Note the absence of the "2" as it is only one side of the circuit. 
K is >= 1 with the value depending on the relay choice

Supposing we have calculated V_kp >= 400,
and so clearly by its own formula V_s must be >= 200

However as MINIMUMs we could choose a CT with V_kp = 800 and a Vs = 300

Some manufacturers data sheets make statements such as V_s = V_kp / 2
Clearly this is not correct,
The formula for the MINIMUM V_kp happens to result in a value which is twice the MINIMUM Vs
The correct simplification is
V_smin = V_kpmin / 2

If the relay is directly set in terms of voltage (and is selected as a relay that will operate correctly for heavily saturated waveforms such as MFAC14/34), our job is done.

If the relay is set in terms of current we have a further step.

We have already determined the V_smin for stability for through faults.

When that voltage appears at the relay point of the differential circuit, we must ensure that the current through the relay is LESS than the setting current of the relay. 
This is achieved by ensuring the total impedance of the  relay path is high enough to limit the current to less than setting. 
This is achieved by adding a Stabilising Resistor in series with the relay.  In theory we should cater for the impedance of the relay as part of the overall relay path impedance, however in practice this is usually inconsequential, and in any case we are again calculating a minimum total impedance.

R_stab >= V_smin / I_op

• I_op is the actual pick up setting of the relay

Ensuring CT can supply enough voltage for an internal fault.

Both V_kp and V_s are calculated as MINIMUMs.

Suppose we have Vkp >= 400 V
We therefore require Vs >= 200 V

If we choose V_kpactual = 400 V, we could choose V_sactual = 390 V and both minimum requirements are met.

However suppose for V_kpactual = 400 V, we choose V_sactual = 500V

This presents a problem as clearly the CTs ability to generate voltage is lower than the relay pick up setting, so basically the CT will saturate, i.e. the voltage cannot get any larger, before the relay can operate.

Although there is no specific rule that I am aware of, it would seem generally good practice to ensure that V_kpactual >= V_kpmin and V_kpactual >= 2 x V_sactual

Therefore during an internal fault, the relay pick-up voltage would be less than half of the knee-point voltage of the current transformers to ensure reliable operation for internal faults as well as catering for the simplified analysis of the relay being located at the electrical midpoint of the CT wiring where the voltage across the relay is half the voltage developed by the CT when another CT is saturated. In some cases this results in CTs with several kV knee point voltages and hence non-linear resistors are required to limit the over-voltages that are experienced during internal faults to less than 2 kV peak, which is the standard insulation level used for secondary equipment and wiring.

What is Ifmax?

Clearly differential circuits and the knee point voltage calculation is about considerations of the saturation level of the CTs.

The above formulas simply show that we must consider the maximum through fault current for determining the minimum Knee Point Voltage.  In general we would refer to this maximum fault current as the "steady state" fault current.

However clearly we are interested in the scheme performance within the first 1-2 cycles of the fault current. 

Depending on the power system X/R factor, and or the sub-transient and transient equipment impedances, we know that the initial few cycles of a fault current waveform may be offset, in some cases quite severely and take several cycles to decay.
CT saturation happens instantaneously resulting in the output waveform potentially not reaching its full expected peak value.

Therefore this value of I_fmax must take this into account.

Therefore some methods include a further factor to the minimum knee point voltage formula, whilst others argue that I_fmax means the instantaneous I_fmax within the cycle, i.e. already incorporating the offset.

Fault Current Sensitivity

The protection sensitivity corresponds to the sum of the magnetising currents of all parallel connected current transformers plus the relay current at the relay pick-up voltage given by the formula:

I_o = I_s + n.I_e

• I_o is the effective operating current sensitivity
• I_s is the pick up current of the relay
• n is the number of CT cores in parallel
• I_e is the CT excitation current

Typically, as internal faults will result in CT saturation due to the high relay burden, the operating time for a high impedance differential relay must be less than 1 cycle prior to saturation making it a very effective protection system easily graded with remote line protections seeing into the substation.

The need for Metrosils

As a result of the HiZ path, certainly there will be potential for high voltage spikes which may exceed the insulation rating of the wiring and relay - much more likely with voltage operated relays with extremely low current sensitivity e.g. an MFAC relay @100 V setting has current sensitivity of ~20 mA and therefore we can conclude it has an effective impedance of 5k Ohms. So 20 A secondary fault current for an INTERNAL fault is forced through 5k Ohms and would theoretically produce 100 kV!! which would basically blow up the relay and flash all the wiring.

Hence there may be a need for voltage limiting Metrosils ( http://www.metrosil.com/ )to be added in parallel to the relay path.  Calculations should be done to check the requirement in each case.

Parallel De-sensitising Resistors

Some applications have employed the use of a resistor in parallel to the high impedance relay circuit in order to desensitise the minimum fault current to operate the high impedance relays.  Relays that are directly set as a current setting e.g. an MCAG34 with 50-200% of rated current can of course be set accordingly, but voltage operated relays e.g. MFAC34 set as 25-125 V have a fixed current sensitivity of ~20 mA.   Therefore the parallel de-sensitising resistors may be useful to ensure that the minimum fault sensitivity is above the normal current of a single circuit to prevent mal-operation due to an open circuit CT.  However the effect of this is to make the scheme a medium or low impedance scheme with the associated stability issues. In these cases, the secondary current flows during external faults with one CT saturated must be considered, i.e. the high impedance relay path is to aid in making all the circulating current flow through the saturated CT, rather than the relay.

CT Switching

One of the typical application difficulties of high impedance schemes is on complex bus bar arrangements, such as double bus arrangements, where the CTs connected to the protection zone must be changed to reflect different bus bar configurations. In these circumstances, the CT circuits must be reconnected dynamically as the isolators positions are changed. This is achieved by auxiliary contacts on the isolators which change the CT connections to different bus bar protection zones.

This introduces a risk of mal-operation of the auxiliary contacts leading to open circuit CTs with the risk of CT explosion and/or incorrect operation of the bus bar protection under healthy conditions. This can be alleviated by using parallel desensitising resistors to increase the operating current sensitivity of voltage-set relays above the largest rated feeder current, or increasing the current setting on current-set relays.  Given the high speed operation of bus bar protection relays, consideration must also be given to the intermediary arrangement where the CTs are connected to two zones simultaneously as the isolator changes position and the CT circuits move through a “make-before-break” sequence - this effectively makes the two zones temporarily appear as one large zone with two differential relays connected in parallel. Hence in these arrangements it is usual to also use some form of CT supervision to detect and guard against inadvertent CT open circuits.

Check Zones

Given the need to avoid mal-operation of bus bar protection and the heavy reliance on CT performance and connections, complex substations with multiple bus bar protection zones often also employ a fixed check zone across the complete substation where the CTs do not need to be switched.

Note the Check Zone relay must operate on its own set of CTs and are located on the "outside" of the Zone CTs to ensure total coverage.

Also note there the Check Zone relay does not have CTs on the bus-tie leg, it only requires CTs on the incoming and outgoing feeders to the substation.

This Check Zone operates in conjunction with the individual zones in a “two out of two” tripping requirement to ensure there is a true internal fault prior to tripping the circuit breakers. However this adds the requirement for additional dedicated CT cores for each of the X and Y check schemes.

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